This invention relates generally to noise bypass filtering circuits and more specifically to bypass filtering circuits for high-speed circuits.
In electrical systems that utilize high-speed analog or digital components, high-frequency noise (typically noise signals having a frequency above 5 MHz) is injected into the ground that supply busses due to the fast response time and large amplitude excursions of the signal processing components. Such noise transients, often referred to as a noise spike can seriously limit the sensitivity and stability of analog circuits. Further, in some digital circuit applications, the high-speed switching noise may be of such a magnitude to cause errors in the digital operations. Conventional bypass filtering, in which the noise signals on power supply busses are bypassed directly to ground through a bypass capacitor, will not work to isolate a component from these very fast noise transients because they cannot be instantaneously absorbed by the system ground. Instead, they persist on the busses and in other closely connected circuits for sufficient periods to alter the ground reference or bias voltage sufficient for a high-speed circuit to respon to the bias or ground voltage error. This, in turn, may cause an erroneous switching transition in a digital circuit or output state change in a comparator circuit, for example. Thus, there is a need for a bypass filter network for use in high-speed circuits which confine high frequency noise generated in a system component to the component in which it is generated in order to prevent noise contamination of power supply and ground busses in a high-speed electronic system.